System-on-Chip engineering S.L. (SoC-e) is the leading provider of Ethernet switching and IEEE 1588 IP cores for Xilinx FPGAs. Since 2010, SoC-e has licensed the biggest multinationals of the Electric, Industrial and Aerospace sectors. Soc-e IP core portfolio has increased to provide complete time-aware switching implementations. Additionally, SoC-e FPGA based System-on-Modules (SoMs) focused on industrial networking are helping customers world-wide to reduce the time-to-market of their new equipment and to benefit from high-availability Ethernet networking protocols.
The networking IP portfolio includes a low-latency implementation for the zero-delay recovery time HSR/PRP protocols; a time-aware (IEEE 1588) Managed Ethernet Switch matrix and other redundant Ethernet solutions (DLR, MRP, etc.).
These networking IPs can be combined with the IEEE 1588-2008v2 solutions from SoC-e to achieve sub-microsecond synchronization on Ethernet interconnected devices. SoC-e provides both, the hardware and software units, to implement PTP equipment.
SoC-e IPs can be easily integrated and configured on Xilinx Vivado Tool using the graphic interface. Thus, thanks to this high level of abstraction and to the reference designs provided by SoC-e tech Team, it is not necessary any HDL background to build your added-value Ethernet switch.
SoC-e also can provide FPGA and reconfigurable SoC (Zynq and Zynq Ultrascale+) based SoMs preconfigured with standard or with user-defined design. In this last case, SoC-e engineering Team works tightly with the customer to implement a Hardware and Software combination that fulfills the project requirements providing a valuable module with upgrading capabilities and with a long term production life due to the use of selected FPGA devices.
Apart from the well known Ethernet Networking technology, that is gaining acceptance in all the Sectors, the need for higher availability and synchronization in newer systems is boosting the use of the following technologies implemented by SoC-e products:
Nowadays, High Availability Networks for Critical Systems is a must. From the technical point of view, the most advanced solutions ensure no-packet-lost in case of single network failure and “Plug & Work” operation. Additionally, the customers demand Inter-operable and Standardized solutions in order to avoid vendor proprietary approached.
In this sense, the International Electrotechnical Commission (IEC) has worked intensively to define High Availability Ethernet based solutions. The two protocols that ensure zero-delay recovery time in case of a network failure are: High-availability Seamless Redundancy (HSR, IEC 62439-3-Clause 5) and Parallel Redundancy Protocol (PRP, IEC 62439-3-Clause 4).
HSR provides redundancy by sending packets in both directions through a ring network.
A simple HSR network consists of Doubly Attached Bridging Nodes, each having two Ethernet ports. A HSR node sends the same frame over both ports.
A HSR capable destination node receives, in fault-free state, two identical frames over both ports respectively within a certain interval. The first received frame is accepted while the duplicate is discarded. In case of an interruption in the ring, the frame will always be received through the other port.
HSR offers, high availability and very short reaction time. Additionally, the switching rules defined in the standard allow a simple way to calculate the delay in the communication for the Worst Case scenario, enabling the use of this protocol in applications that demands Real Time.
PRP redundancy is implemented in the nodes rather than in the network. Especially adapted nodes (Dual Attached Nodes- DANs), are connected to two independent Ethernet networks (LAN A and LAN B), and send the same frames over both networks.
In a fault-free state, destination nodes consume the first received frame and discard the duplicates. In case of a fault in one of the networks, the frames will still be transmitted and received through the other.
Sub-microsecond Synchronization using Ethernet Networks
It is feasible providing similar accuracy level of synchronization that provides a GPS receiver to a device connected to an Ethernet network. The technology required to benefit from this innovation implements Precise Time Protocol (PTP). PTP is defined in the IEEE 1588-2008 standard and in IEC 61588:2009.
PTP protocol is able to synchronize networked clocks with accuracy down to the nanosecond range. It is based on the Packet Locked Loop (PLL) approach. Like any active synchronized circuit, the IEEE1588 clock is a servo implemented with a closed-loop algorithm of some sort. The final aim of these calculations is providing an accurate 64 bit Timer in all the synchronized devices. This Timer can be used for data time-stamping and for distributed control and even, for Operating System synchronization purposes.
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